1. Field of the Invention
The present invention relates to image display devices implemented with a spatial light modulator (SLM) includes a plurality of micromirrors. More particularly, this invention relates to the circuit configurations for controlling and modulating the SLM includes a deformable micromirror device.
2. Description of the Related Art
After the dominance of CRT technology in the display industry over 100 years, Flat Panel Display (noted as “FPD” hereinafter) and Projection Display have gained popularity because of the smaller form-factor and larger size of screen. Among several types of projection displays, the ones using micro-Spatial Light Modulators (SLMs) are gaining recognition by consumers because of high performance of picture quality as well as lower cost than FPDs. There are two types of a micro-SLM used for projection displays in the market. One is micro-Liquid Crystal Display (LCD) and the other is micromirror technology. Because a micromirror device uses un-polarized light, a micromirror device has an advantage on brightness over micro-LCD, which uses polarized light.
Even though there have been significant advances of the technologies implementing an electromechanical micromirror device as an SLM in recent years, there are still limitations and difficulties when it is employed to provide a high quality image. Specifically, when the images are digitally controlled, the image quality is adversely affected due to the fact that the images are not displayed with a sufficient number of gray scales.
An electromechanical micromirror device is drawing a considerable interest as an SLM. The electromechanical micromirror device consists of “a mirror array” arraying a large number of mirror elements. In general, the mirror elements ranging from 60,000 to several millions are arrayed on a surface of a substrate in an electromechanical micromirror device. Referring to FIG. 1A for an image display system 1 including a screen 2 is disclosed in a reference U.S. Pat. No. 5,214,420. A light source 10 is used for generating light energy for illuminating the screen 2. The generated light 9 is further collimated and directed toward a lens 12 by a mirror 11. Lenses 12, 13 and 14 form a beam columnator operative to columnate light 9 into a column of light 8. A spatial light modulator (SLM) 15 is controlled on the basis of data input by a computer 19 via a bus 18 and selectively redirects the portions of light from a path 7 toward an enlarger lens 5 and onto screen 2. The SLM 15 has a mirror array includes switchable reflective elements 17, 27, 37, and 47 each comprising a mirror 33 connected by a hinge 30 and supported on a surface 16 of a substrate in the electromechanical mirror device as shown in FIG.1B. When the element 17 is in one position, a portion of the light from the path 7 is redirected along a path 6 to lens 5 where it is enlarged or spread along the path 4 to impinge on the screen 2 so as to form an illuminated pixel 3. When the element 17 is in another position, the light is redirected away from the display screen 2 and hence the pixel 3 is dark.
Most of the conventional image display devices such as the devices disclosed in U.S. Pat. No. 5,214,420 are implemented with a dual-state mirror control that controls the mirrors to operate at a state of either ON or OFF. The quality of an image display is limited due to the limited number of gray scales. Specifically, in a conventional control circuit that applies a PWM (Pulse Width Modulation), the quality of the image is limited by the LSB (least significant bit) or the least pulse width as control related to the ON or OFF state. Since the mirror is controlled to operate in an either ON or OFF state, the conventional image display apparatuses have no way to provide a pulse width to control the mirror that is shorter than the control duration allowable according to the LSB. The least quantity of light, which determines the least amount of adjustable brightness for adjusting the gray scale, is the light reflected during the time duration according to the least pulse width. The limited gray scale due to the LSB limitation leads to a degradation of the quality of the display image.
Specifically, FIG.1C exemplifies a control circuit for controlling a mirror element according to the disclosure in the U.S. Pat. No. 5,285,407. The control circuit includes a memory cell 32. Various transistors are referred to as “M*” where “*” designates a transistor number and each transistor is an insulated gate field effect transistor. Transistors M5 and M7 are p-channel transistors; while transistors M6, M8, and M9 are n-channel transistors. The capacitances C1 and C2 represent the capacitive loads in the memory cell 32. The memory cell 32 includes an access switch transistor M9 and a latch 32a, which is based on a Static Random Access switch Memory (SRAM) design. The transistor M9 connected to a Row-line receives a DATA signal via a Bit-line. The memory cell 32-written data is accessed when the transistor M9 that has received the ROW signal on a Word-line is turned on. The latch 32a consists of two cross-coupled inverters, i.e., M5/M6 and M7/M8, which permit two stable states, that is, a state 1 is Node A high and Node B low, and a state 2 is Node A low and Node B high.
The control circuit as illustrated in FIG. 1C controls the mirrors to switch between two states and the control circuit drives the mirror to oscillate to either an ON or OFF deflected angle (or position) as shown in FIG.1A. The minimum quantity of light controllable to reflect from each mirror element for image display, i.e., the resolution of gray scale of image display for a digitally controlled image display apparatus, is determined by the least length of time that the mirror is controllable to hold at the ON position. The length of time that each mirror is controlled to hold at an ON position is in turn controlled by multiple bit words.
FIG. 1D shows the “binary time durations” in the case of controlling SLM by four-bit words. As shown in FIG. 1D, the time durations have relative values of 1, 2, 4, and 8 that in turn determine the relative quantity of light of each of the four bits, where the “1” is least significant bit (LSB) and the “8” is the most significant bit. According to the PWM control mechanism, the minimum quantity of light that determines the resolution of the gray scale is a brightness controlled by using the “least significant bit” for holding the mirror at an ON position during a shortest controllable length of time.
In a simple example with n bits word for controlling the gray scale, one frame time is divided into (2n−1) equal time slices. If one frame time is 16.7 msec., each time slice is 16.7/(2n−1) msec.
Having set these time lengths for each pixel in each frame of the image, the quantity of light in a pixel which is quantified as 0 time slices is black (no the quantity of light), 1 time slice is the quantity of light represented by the LSB, and 15 time slices (in the case of n=4) is the quantity of light represented by the maximum brightness. Based on quantity of light being quantified, the time of mirror holding at the ON position during one frame duration is determined by each pixel. Thus, each pixel with a quantified value which is more than 0 time slices is displayed by the mirror holding at an ON position with the number of time slices corresponding to its quantity of light during one frame duration. The viewer's eye integrates brightness of each pixel so that the image is displayed as if the image were generated with analog levels of light.
For controlling deflectable micromirror devices, the PWM calls for the data to be formatted into “bit-planes”, where each bit-plane corresponds to a bit weight of the quantity of light. Thus, when the brightness of each pixel is represented by an n-bit value, each frame of data has the n-bit-planes. Then, each bit-plane has a 0 or 1 value for each mirror element. In the PWM described in the preceding paragraphs, each bit-plane is independently loaded and the mirror elements are controlled according to bit-plane values corresponding to them during one frame. For example, the bit-plane representing the LSB of each pixel is displayed as 1 time slice.